This invention relates generally to electroless copper plating and more particularly to apparatus for determining the initiation and progression of such plating including plated hole quality.
Autocatalytic or electroless plating of copper is frequently employed to additively construct circuit conductors on printed circuit panels because copper can be deposited directly on non-conducting substrates. Its application, however, requires careful sensitization or seeding of the areas to be plated which comprises a treatment with a solution of a colloidal metal and then an acceleration step to remove inactive components of the colloid from the sensitized dielectric substrate. After suitable rinsing, the circuit panel is immersed in the electroless plating bath which must be maintained within narrow tolerance limits as to components and temperature. The series of baths, the timings, temperatures and the maintenance of bath proportionalities are all critical to the plating process. Although the baths can be analyzed with some degree of accuracy, it is difficult to anticipate the degrees of change upon immersion of substrates and prevent occasional erratic performance.
There are instruments and techniques to determine the approximate status of the bath, but there occur undetected imbalances or variations in both the sensitization process or bath makeup. These variations may cause poor adherence of the seed that results in voids in the plated areas. Plating areas particularly prone to voids are the hole walls of blind or through holes in circuit panels. Because of the length-to-diameter ratio, the circulation of the baths in the holes may not be as thorough thus creating open circuits or voids on the hole walls where no plated metal has adhered.
The panels each may have hundreds or thousands of holes and are immersed in groups in the baths for both the sensitizing and plating steps. There is no known check in maufacturing for judging the quality of the sensitizing step except to attempt the plating. Since the plating is a slow process, the panels cannot be ultimately checked until the prescribed time has elapsed. Thus many panels may conclude full cycles of processing only to be found having voids that render the panels useless, necessitating their discard.